Electrostatic discharge ESD , electrical overstress EOS , and latchup have been an issue in devices, circuit and systems for VLSI microelectronics for many decades and continue to be an issue till today. This chapter will address some of the fundamental reasons decisions that are made for choice of circuits and layout. Many publications do not explain why certain choices are made, and we will address these in this chapter. Physical models, failure mechanisms and design solutions will be highlighted. The chapter will close with discussion on how to provide both EOS and ESD robust devices, circuits, and systems, design practices and procedures.